The ML407 is an add-on clock synthesizer for the ML4039 BERT(Bit Error Ratio Tester) series that is intended for multi-UI sinusoidal jitter generation. It generates the necessary SJ required for doing electrical stressed input compliance testing for 100Gbps modules and hosts as per OIF-CEI VSR28 and IEEE802.3 (CAUI-4).
-Differential clock output
-Fixed rate clean clock for scope triggering 156.25 MHz
-Nominal clock rate 2.5 GHz
-Divides ratios of 2, 4, and 8